HAL default configuration file. More...

#include "stm32yyxx_hal_conf.h"
#include "stm32f7xx_hal_adc.h"
#include "stm32f7xx_hal_crc.h"
#include "stm32f7xx_hal_dac.h"
#include "stm32f7xx_hal_i2c.h"
#include "stm32f7xx_hal_pwr.h"
#include "stm32f7xx_hal_spi.h"
#include "stm32f7xx_hal_tim.h"
#include "stm32f7xx_hal_uart.h"
#include "stm32f7xx_hal_pcd.h"

Macros
#define	HSE_VALUE 25000000U
	Include the default list of modules to be used in the HAL driver and manage module deactivation.

#define	HSE_STARTUP_TIMEOUT 100U

#define	HSI_VALUE 16000000U
	Internal High Speed oscillator (HSI) value.

#define	LSI_VALUE 32000U
	Internal Low Speed oscillator (LSI) value.

#define	LSE_VALUE 32768U
	External Low Speed oscillator (LSE) value.

#define	LSE_STARTUP_TIMEOUT 5000U

#define	EXTERNAL_CLOCK_VALUE 12288000U
	External clock source for I2S peripheral This value is used by the I2S HAL module to compute the I2S clock source frequency, this source is inserted directly through I2S_CKIN pad.

#define	VDD_VALUE 3300U
	This is the HAL system configuration section.

#define	TICK_INT_PRIORITY 0x00U

#define	USE_RTOS 0U

#define	PREFETCH_ENABLE 1U /* To enable prefetch */

#define	ART_ACCELERATOR_ENABLE 1U /* To enable ART Accelerator */

#define	USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */

#define	USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */

#define	USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */

#define	USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */

#define	USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */

#define	USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */

#define	USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */

#define	USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */

#define	USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */

#define	USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */

#define	USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */

#define	USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */

#define	USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */

#define	USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */

#define	USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */

#define	USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */

#define	USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */

#define	USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */

#define	USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */

#define	USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */

#define	USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */

#define	USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */

#define	USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */

#define	USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */

#define	USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */

#define	USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */

#define	USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */

#define	USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */

#define	USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */

#define	USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */

#define	USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */

#define	USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */

#define	USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */

#define	USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */

#define	USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */

#define	USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */

#define	USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */

#define	USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */

#define	MAC_ADDR0 2U
	Uncomment the line below to expanse the "assert_param" macro in the HAL drivers code.

#define	MAC_ADDR1 0U

#define	MAC_ADDR2 0U

#define	MAC_ADDR3 0U

#define	MAC_ADDR4 0U

#define	MAC_ADDR5 0U

#define	ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */

#define	ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */

#define	ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */

#define	ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */

#define	LAN8742A_PHY_ADDRESS 0x00U

#define	PHY_RESET_DELAY 0x00000FFFU

#define	PHY_CONFIG_DELAY 0x00000FFFU

#define	PHY_READ_TO 0x0000FFFFU

#define	PHY_WRITE_TO 0x0000FFFFU

#define	PHY_BCR ((uint16_t)0x00U)

#define	PHY_BSR ((uint16_t)0x01U)

#define	PHY_RESET ((uint16_t)0x8000U)

#define	PHY_LOOPBACK ((uint16_t)0x4000U)

#define	PHY_FULLDUPLEX_100M ((uint16_t)0x2100U)

#define	PHY_HALFDUPLEX_100M ((uint16_t)0x2000U)

#define	PHY_FULLDUPLEX_10M ((uint16_t)0x0100U)

#define	PHY_HALFDUPLEX_10M ((uint16_t)0x0000U)

#define	PHY_AUTONEGOTIATION ((uint16_t)0x1000U)

#define	PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U)

#define	PHY_POWERDOWN ((uint16_t)0x0800U)

#define	PHY_ISOLATE ((uint16_t)0x0400U)

#define	PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U)

#define	PHY_LINKED_STATUS ((uint16_t)0x0004U)

#define	PHY_JABBER_DETECTION ((uint16_t)0x0002U)

#define	PHY_SR ((uint16_t)0x1FU)

#define	PHY_SPEED_STATUS ((uint16_t)0x0004U)

#define	PHY_DUPLEX_STATUS ((uint16_t)0x0010U)

#define	PHY_ISFR ((uint16_t)0x01DU)

#define	PHY_IMR ((uint16_t)0x001E)

#define	PHY_ISFR_INT4 ((uint16_t)0x0010U)

#define	USE_SPI_CRC 0U

#define	assert_param(expr) ((void)0U)
	Include module's header file.

Detailed Description

HAL default configuration file.

Attention

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

Macro Definition Documentation

◆ EXTERNAL_CLOCK_VALUE

#define EXTERNAL_CLOCK_VALUE 12288000U

External clock source for I2S peripheral This value is used by the I2S HAL module to compute the I2S clock source frequency, this source is inserted directly through I2S_CKIN pad.

Value of the Internal oscillator in Hz

◆ HSE_STARTUP_TIMEOUT

#define HSE_STARTUP_TIMEOUT 100U

Time out for HSE start up, in ms

◆ HSE_VALUE

#define HSE_VALUE 25000000U

Include the default list of modules to be used in the HAL driver and manage module deactivation.

Adjust the value of External High Speed oscillator (HSE) used in your application. This value is used by the RCC HAL module to compute the system frequency (when HSE is used as system clock source, directly or through the PLL). Value of the External oscillator in Hz

◆ HSI_VALUE

#define HSI_VALUE 16000000U

Internal High Speed oscillator (HSI) value.

This value is used by the RCC HAL module to compute the system frequency (when HSI is used as system clock source, directly or through the PLL). Value of the Internal oscillator in Hz

◆ LSE_STARTUP_TIMEOUT

#define LSE_STARTUP_TIMEOUT 5000U

Time out for LSE start up, in ms

◆ LSE_VALUE

#define LSE_VALUE 32768U

External Low Speed oscillator (LSE) value.

< Value of the Internal Low Speed oscillator in Hz The real value may vary depending on the variations in voltage and temperature.
Value of the External Low Speed oscillator in Hz

◆ LSI_VALUE

#define LSI_VALUE 32000U

Internal Low Speed oscillator (LSI) value.

LSI Typical Value in Hz

◆ PHY_AUTONEGO_COMPLETE

#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U)

Auto-Negotiation process completed

◆ PHY_AUTONEGOTIATION

#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U)

Enable auto-negotiation function

◆ PHY_BCR

#define PHY_BCR ((uint16_t)0x00U)

Transceiver Basic Control Register

◆ PHY_BSR

#define PHY_BSR ((uint16_t)0x01U)

Transceiver Basic Status Register

◆ PHY_DUPLEX_STATUS

#define PHY_DUPLEX_STATUS ((uint16_t)0x0010U)

PHY Duplex mask

◆ PHY_FULLDUPLEX_100M

#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U)

Set the full-duplex mode at 100 Mb/s

◆ PHY_FULLDUPLEX_10M

#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U)

Set the full-duplex mode at 10 Mb/s

◆ PHY_HALFDUPLEX_100M

#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U)

Set the half-duplex mode at 100 Mb/s

◆ PHY_HALFDUPLEX_10M

#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U)

Set the half-duplex mode at 10 Mb/s

◆ PHY_IMR

#define PHY_IMR ((uint16_t)0x001E)

PHY Interrupt Mask register Offset

◆ PHY_ISFR

#define PHY_ISFR ((uint16_t)0x01DU)

PHY Interrupt Source Flag register Offset

◆ PHY_ISFR_INT4

#define PHY_ISFR_INT4 ((uint16_t)0x0010U)

PHY Link down inturrupt

◆ PHY_ISOLATE

#define PHY_ISOLATE ((uint16_t)0x0400U)

Isolate PHY from MII

◆ PHY_JABBER_DETECTION

#define PHY_JABBER_DETECTION ((uint16_t)0x0002U)

Jabber condition detected

◆ PHY_LINKED_STATUS

#define PHY_LINKED_STATUS ((uint16_t)0x0004U)

Valid link established

◆ PHY_LOOPBACK

#define PHY_LOOPBACK ((uint16_t)0x4000U)

Select loop-back mode

◆ PHY_POWERDOWN

#define PHY_POWERDOWN ((uint16_t)0x0800U)

Select the power down mode

◆ PHY_RESET

#define PHY_RESET ((uint16_t)0x8000U)

PHY Reset

◆ PHY_RESTART_AUTONEGOTIATION

#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U)

Restart auto-negotiation function

◆ PHY_SPEED_STATUS

#define PHY_SPEED_STATUS ((uint16_t)0x0004U)

PHY Speed mask

◆ PHY_SR

#define PHY_SR ((uint16_t)0x1FU)

PHY special control/ status register Offset

◆ TICK_INT_PRIORITY

#define TICK_INT_PRIORITY 0x00U

tick interrupt priority

◆ VDD_VALUE

#define VDD_VALUE 3300U

This is the HAL system configuration section.

Value of VDD in mv

Macros