system_stm32h5xx.c File Reference

CMSIS Cortex-M33 Device Peripheral Access Layer System Source File. More...

#include "stm32h5xx.h"

Macros
#define	VECT_TAB_OFFSET   0x00U

Functions
void	SystemInit (void)
	Setup the microcontroller system.
void	SystemCoreClockUpdate (void)
	Update SystemCoreClock variable according to Clock Register Values.

Variables
uint32_t	SystemCoreClock = 64000000U
const uint8_t	AHBPrescTable [16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}
const uint8_t	APBPrescTable [8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}

Detailed Description

CMSIS Cortex-M33 Device Peripheral Access Layer System Source File.

Author

MCD Application Team

Attention

Copyright (c) 2023 STMicroelectronics. All rights reserved.

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

This file provides two functions and one global variable to be called from user application:

• SystemInit(): This function is called at startup just after reset and before branch to main program. This call is made inside the "startup_stm32h5xx.s" file.
• SystemCoreClock variable: Contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters.
• SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution.

After each device reset the HSI (64 MHz) is used as system clock source. Then SystemInit() function is called, in "startup_stm32h5xx.s" file, to configure the system clock before to branch to main program.

This file configures the system clock as follows:

---

System Clock source | HSI

SYSCLK(Hz) | 64000000

HCLK(Hz) | 64000000

AHB Prescaler | 1

APB1 Prescaler | 1

APB2 Prescaler | 1

APB3 Prescaler | 1

HSI Division factor | 1

PLL1_SRC | No clock

PLL1_M | Prescaler disabled

PLL1_N | 129

PLL1_P | 2

PLL1_Q | 2

PLL1_R | 2

PLL1_FRACN | 0

PLL2_SRC | No clock

PLL2_M | Prescaler disabled

PLL2_N | 129

PLL2_P | 2

PLL2_Q | 2

PLL2_R | 2

PLL2_FRACN | 0

PLL3_SRC | No clock

PLL3_M | Prescaler disabled

PLL3_N | 129

PLL3_P | 2

PLL3_Q | 2

PLL3_R | 2

PLL3_FRACN | 0

=============================================================================